The „Data Handler“ is a Single Board Computer built in 1975 by „Western Design Systems“ Corporation. The Manual and further Literature name Mr. C.A. Indihar as the founder of Western Design Systems in Santa Clara, California .

The Data Handler Single Board Computer

Built around the MOS 6502 CPU, it has 1KB static RAM of Type 2102 and a „Front Panel“ with 16 Keys for Hex Entry and 10 Function-Keys to control operation. Data „output“ is realized by 16 LEDS for Address and 8 LEDS for DATA.

Data Entry into Ram is done via the Front Panel. This may be much easier than operating an Mits or Altair, but not as comfortable as other SBC with a ROM-Monitor. The following Keys are available:

  • CL Clear : Clears the Adress or Data Value
  • SC Single Cycle : Executes a single CPU Cycle
  • SI Single Instruction : Runs one operation
  • HT Halt : Stop CPU
  • INT Interrupt/Reset : Start from Reset Vector
  • AD Adress : Change to Modify Adress
  • DA Data : Change to Modify Data
  • EX Examine : Examine Data in an Address
  • RN Run : CPU Run
  • DP Deposit : Store Data

Data Entry , Data Display and CPU Management is completely realized in Hardware and not under CPU Control.

There are two I/O Ports on the upper right of the board. One Port for 8-Bit Input and one Port for 8-Bit Data output.

(c)1975 Sign

The board has a Altair compatible BUS Connector, allowing to use one of the many Expansion Cards available for Altair Systems.
Three unpopulated spare sockets are provided for system modification.

To increase system stability, the RC oscillator can be replaced by a Crystal. The SBC needs only one single 5V Supply.
An optional Regulator can be soldered on the back of the board, converting 8V power provided through the Altair Bus or an Altair Power supply to the necessary 5V.

The Manual covers the building and the operation of the Data Handler and also contains the complete Opcode description of the 6502 and the schematics of the board. Though this Manual is marked as REV B, it does not contain the ROR Command.

In the 70s PDF’s have not been developed and you need a printed manual as reference . Buying a manual for a CPU was expensive, so having the 6502 opcodes at hand was very convinient. Additionally there is a section with an instruction lookup table.

A “program section“ contains very few simple programs to start programming.

Data-Handler Manual with Schematics

To my current knowledge, the „Data Handler“ was released in June 1976. The (c)1975 indicates that it was developed and released much earlier, but I could not find earlier evidence. Please mail if you know more !

This is the 1970s – 6502 timetable:

  • 1975-Fall: MOS Introduce 650x Series
  • 1976-03: – Steve Wozniak and Steve Jobs finish work on a computer circuit board, that they call the Apple I computer.
  • 1976-04: – Steve Jobs and Steve Wozniak form the Apple Computer Company, on April Fool’s Day.
  • 1976-05: BYTE magazine announces MOS-KIM-1
  • 1976-06: Radio Electronics advertise Dyna Micro
  • 1976-06: Data Handler in Dr. Dobbs Page 43, Starts from $79
  • 1976-07: The Apple I computer board is sold in kit form, and delivered to stores by Steve Jobs and Steve Wozniak. Price: US$666.66.
  • 1976: August – Steve Wozniak begins work on the Apple II.
  • 1976-09: Data Handler microcomputer digest
  • 1976: December – Steve Wozniak and Randy Wigginton demonstrate the first prototype Apple II at a Homebrew Computer Club meeting.

My Hardware Version seems to be a REV A with all RED LEDs for DATA/ADRESS/RUN, the Handbook provided with it is a Revision „B“ where the RUN Led is said to be orange.

The „Data Handler“ is definitively one of the first SBC’s, and maybe the first 6502 SBC at all.

In the 1976-12 Volume of the PCC Magazine it is said that some schools in the Bay area bought Data Handlers in June 1976, and teachers were instructed to build them. So we can assume that it was well announced before June 1976 !

One Article about the Data Handler was written by a scoolar : Chris Espinosa, later apple employee #8 , and writer of the Apple II Handbooks.

Data Handler Offers:

The bare board was offered for $79, the kit with all parts for $179, so it was half the price of a KIM-1.

The „Data Handler“ was a nice tool to be populated by hobbyists and to learn the Basics of 6502 machine language, but its operation requires some phantasy: Compared to the KIM-1 SBC the Data Handler has NO onboard ROM, PIA or TIA and no Monitor Program.

The „Front Panel“ is a hard wired system to enter data into Ram and start/stop and reset the CPU.


At first the CPU is Reset, then halted, and all inputs have to be cleared.
Then the program is entered in the static RAM locations. If the computation requires input data, these values have to be written in memory addresses. Finally the start address of the program has to be stored in reset vector address $FFFC and $FFFD.

The program execution is then started by resetting the CPU. Manual stepping through the instructions allows to verify that the CPU jumps to program start address and runs the program.

When not single stepped and CPU is set into RUN Mode, the program should finish jumping in an endless loop.

Hint: Using different address ranges depending on the result could indicate the result in the Address Bits LEDs.

When the calculation is finished, the CPU has to be manually halted by pressing „HT“. If there has been results, these could be viewed by examination of the corresponding memory locations.

In the rear right the we can find the I/O-Section of the DBC. It holds a strobed 8-Bit output and 8-Bit input port. Bytes written at Address 0x7FFE appear at the output port, and input data could be read from 0x7FFF. If attached some LEDS, as instructed in the Manual output could be directly controlled.

Interesting Detail: Output not necessarily need to be generated by program control: Data entered via the front panel could be stored at 0x7FFE directly and the result could be instantly controlled at the PIA Port without CPU Control, giving a very direct response of the system.

The Board made of #47 TTL Chips plus 8x1kx1 RAM.
The onboard Ram is located at 0xFC00 not 0x0000 to allow modification of the RESET and Interrupt Vectors.

To my knowledge this disables the use of Zero Page features like Stack (POP/PUSH), Subroutines JSR/RET, Complete Zero Page Storage and all indirect Addressing of the CPU. Only to set the Reset Vectors in Ram…Strange.

In the manual it is strongly suggested to map RAM expansions to Address 0x0000 to enable all CPU features.

Work-Around: Since Address decode is done via some Gates, it seems pretty simple to modify the Address Decoder to additionally Map the existing Ram to Adresse $00xx and $01xx to add Stack and Zero Page features.

In Summer 1976 Homestead-High-School used the DATA HANDLER in computer science class. Chris Espinosa – who later joined Apple at the Age of 14 as employee #8 – was one of the pupils learning 6502 Assembler on this unit. Below you find an article about his experiences with the DATA HANDLER from People Computer Magazine of 1976. Unfortunately the photo has no baseline, but is most likely shows him operating the front panel of the 6502 based SBC.

(c)PCC Magazine and



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